Senior Verification Engineer
- Own and drive the verification methodology for all levels within the SoC.
- Develop test plans and work with the design team to ensure required test coverage.
- Mentor junior engineers in the execution of test plans.
- Work with other teams within the organization including system modelling and L1 control and L2/3 protocol stacks.
- Assist the FPGA emulation team as required.
- Bachelorâ€™s degree in Electrical/Electronic Engineering, Computer Science, or related field.
- 6 years experience working with the verification of complex systems at all levels, from block to full SoC.
- Track record of successful development of test methodologies and execution of test plans in directed or randomized environments.
- Self motivated to meet agreed schedules and deliverables with minimal supervision. Knowledge of key areas and protocols would be an asset, including common peripheral interfaces, on-chip interconnect, and embedded microcontrollers.
- Proficient in hardware description languages (preferably Verilog), and verification languages such as System Verilog.
- Experience in cellular and/or wireless communications systems would be a considerable benefit.
- Excellent communication skills, both verbal and written.